Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20688 Discussions

NIOS II and Cyclone III Remote Update

Altera_Forum
Honored Contributor II
9,010 Views

Have spent several days now searching and reading and think I am nearly there... but not quite. I am using the NIOS II core with SOPC builder. I use Quartus II for the FPGA image. This is a project I have inherited which kept the FPGA image in a ECPS64 and the software image in CFI. I have combined the two and keep them in the EPCS64. Works OK. I have been trying to get the remote update controller to work. I have put it into the core via SOPC and can read and write its registers via NIOS. I can also make it do a reconfig but it always seems to use the factory image. Has any one got a working example using the Cyclone III and NIOS II? 

 

I use the following to read 2 of the registers... ParamValue = IORD( REMOTE_UPDATE_CYCLONEIII_0_BASE, 0x4); 

ParamValue = IORD( REMOTE_UPDATE_CYCLONEIII_0_BASE, 0x0); 

 

After power on both registers read 0. 

After reconfig command, register 0 = 1 and register 4 = 8 

 

Any ideas please? 

Brain is starting to hurt! 

0 Kudos
69 Replies
Altera_Forum
Honored Contributor II
492 Views

You must enable the watchdog feature in the factory software before triggering the reconfiguration; then you clear it in the application software. This way if fpga is configured but software doesn't start, the watchdog would reset back to the factory image.

0 Kudos
Altera_Forum
Honored Contributor II
492 Views

Did it, enable the watchdog in the factory sof but now I can't boot on the application image I always stay in the factory image.

0 Kudos
Altera_Forum
Honored Contributor II
492 Views

I modified 0x5 by ((0x1FFFFFFF) >>17) to obtain upper 12 bits of 29-bit watchdog timeout value, ok now it boots on 

my application software, but after awhile I go back to the factory software while I disabled the in the app code like in the 

code above.
0 Kudos
Altera_Forum
Honored Contributor II
492 Views

Thanks for sharing.

0 Kudos
Altera_Forum
Honored Contributor II
492 Views

factory code : 

IOWR_RU_Watchdog_Timeout_Value(0x1FFF0000 >> 17); 

IOWR_RU_Force_Osc_Int(0x1); // Force the internal oscillator as startup state machine 

IOWR_RU_Early_Conf_Done(0x1); // Force Early CONF_DONE 

 

what do I have to write in my app code to prevent my app code to go back to the fac mode while watchdog was disabled ?
0 Kudos
Altera_Forum
Honored Contributor II
492 Views

It's like if the IOWR from my app code didn't act...

0 Kudos
Altera_Forum
Honored Contributor II
492 Views

I found this doc maybe this explains why with the app code writing in a register is impossible, when for example I try 

to disable this watchdog timer from my app code ?

0 Kudos
Reply