Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Nested Qsys IP

Honored Contributor II

Quartus 17.1.0 Pro 


Can a custom Qsys component include a Qsys IP file? When I attempt to do this, the QSYS file is copied, but not generated. This results in the following error during Synthesis: 


Error(16556): The synthesis RTL for *.qsys has not been generated. Generate the synthesis RTL from within Platform Designer. 


I'm using the "add_fileset_file" TCL command to add the QSYS file, but what would the correct "type" property be? I've tried "ACCESSORY_IP" and "OTHER," but when looking at the generated QIP file, nothing seems to tag the global assignment with "QSYS_FILE." I always see MISC_FILE or SOURCE_FILE, which leads to my error message.  


My current work around is to modify the generated QIP file with the proper "QSYS_FILE" tag. 

Is this expected or did I miss something?  


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Honored Contributor II

The important question is what file(s) have you added to your Quartus project? All you should have to do is have the .qip file added to your project. .qip points to all other files needed for the system after the system has been generated. 


Or you can add just the system's .qsys file to the project. With that, the system gets generated during compilation so you don't have to first manually generate in Platform Designer. 


You should not have to edit any files to make this work.
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