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Hi,
I am new on Nios II design, from Altera reference books I face a problems about the Timeout Period of Interval Timer Core. The function of Timeout Period is work as frequency divider of system clock? Example: My system(CPU) clock is 10ns, then on the Timeout Period setting I set it to 1us, therefore is it the system now will become 1us? or the timeout period output is just for internal timer interrupt? Hope my question is clear.... Thanks !Link Copied
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The timer is only a timer. It is not a frequency divider for the system clock. The timeout period specifies how often the interrupt will occur.
Frequency division can be performed with a PLL or by writing your own clock divider. Jake- Mark as New
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Thank You Jake!

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