Outputs states during boot

[Quentin33]

Hello,

We work on MAX10 intel FPGA 10M40DAF484C8G. When we power up the FPGA, all outputs go to high state level during the boot sequence.

Is there a possibility to hold all outputs to tri state level during the boot ?

When we use Crypted pof, the boot sequence take more time and make us some issues on our equipment.

Best regards

[YuanLi_S_Intel]

MAX10 is by default in tri-state during power up, before user mode.