PFL supports dual CFI flash devices to achieve faster configuration time. It also supports multiple QSPI devices. Can the QSPI devices also be used in parallel to create a 16 or 32bit flash data bus to achieve a faster config time?

[CBlow]

Hi Shafiq,

Not entirely clear yet. I understand your point about more data storage. I do not understand why the configuration time example on page 49 states the time calculation is identical to 16-bit CFI flash. Can you please clarify the time calculation example?

thanks.

[ShafiqY_Intel]

Hi CBlow,

I'm a little bit confuse with description. He is asking Configuration Data bus not Flash Data bus. (I'll edit the description to avoid another confusion).

For flash data bus wise, yes it will reduce the configuration time. If one QSPI flash is used, the flash data bus is 4 bits. Whereas, if cascaded four QSPI flash is used, the flash data bus is 16 bits.

Thus for Configuration time, cascaded four QSPI flash have shorter configuration time compare to one QSPI flash.

Cheers