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I am testing PLL output from an old Stratix board. The PLL
has an onboard 80MHz crystal as input clock. However at > 60 MHz, the PLL output is not as square as I wish with ripple and 50mv undershot. At 250MHz, it simply looks like sine wave. The output is observed by a fast scope with 50 ohm termination. Here is my question: is this expected, or something is wrong in my setup that prevent me from geting perfect square at high freq?Link Copied
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you did not tell us which scope was used for measurement.
Your scope should have sample rates of at least 2.5 GS/s. What kind of probes did you use ? Be aware that the characteristic impedance of the transmission line used on your PCB is important and how it is connected to your chip.- Mark as New
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My scope is tek TDS5034B, sampling rate is 5G/s.
My stratix board have an SMA connector for PLL output, from which I use a SMA-BNC adaptor + BNC cable to the scope. all cable and connector should have a bandwidth well beyond 2GHz. Anybody have monitored your PLL output at high frequency?- Mark as New
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what i/o standard and settings are you using?
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checking the pin planner, the output pin is 3.3 v LVCMOS.
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I suggest to think about some basic signal theory relations. TDS5034 has a bandwidth of 350 MHz. To display a 250 MHz square wave different from a sine, you'll need at least 750 MHz bandwidth to see the 3rd harmonics.
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I shall borrow a 750Mhz scope to double check the waveform. meanwhile, how do I get a differential pair from the PLL out?
I changed the IO standard for my PLL output pin to Differential-SSTL2, however quartus II complain about: Error: Can't place enhanced PLL "altpll2:inst23|altpll:altpll_component|pll" in PLL location PLL_5 because I/O cell "Pulsar_Out" (port type EXTCLK of the PLL) is placed in an I/O pin (Pin_B15) which cannot feed port type EXTCLK of PLL location PLL_5 suggestion?- Mark as New
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Hi,
I am looking for an application in which we can take transmitter lock out through SMA connector and feed it to one of the trigger of DSA (Digital Serial Analyzer). So i wanted to know, what is the maximum differential clock frequency that we can get through SMA output port of Stratix V GT board. Can we get some 10+ gigahertz clock output from it. Thanks
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