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Paid software project request

Honored Contributor II


we are looking for a developer able to modify an existing AMD/NVIDIA OpenCL software to make it run on a FPGA board instead of a GPU, in order to gain a significant performance boost while performing the same calculations. 


The software in question is a cryptocurrency miner, so it basically performs cryptographic hash calculations. 


The source code is here: 

A docker file is also available here: 

This software has many .cl kernels, one for each different cryptocurrency algorythm to be mined. 

But the only kernel we ask you to modify to run on an FPGA is ( , which calculates the Cryptonight algorithm ( currencies: Monero, Bytecoin and others ).  


We expect that you provide us with source+docker file of your software, which must be able to calculate at least 100 000 Hashes/second on a FPGA. 


The FPGA we are considering is the Nallatech 510t , but before confirming that we are asking you to suggest which is the one you think has best performance/costs for this task. 


You can suggest also a different mining software you may want to modify instead of the one above, if you think it is easier for you to get higher mining profit with your alternative. Can be even a different algorithm/currency. 


Candidates for this project should give me: 

- Resume 

- Estimate of developing costs and time 

Either here or via PM 


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2 Replies
Honored Contributor II



Also interested in exploring the viability of mining on a FPGA and was wondering if you had made any progress with this project? 


Honored Contributor II



CryptoNight is a memory-hard hash function. It is designed to be inefficiently computable on GPU, FPGA and ASIC architectures. The CryptoNight algorithm's first step is initializing large scratchpad with pseudo-random data. The next step is numerous read/write operations at pseudo-random addresses contained in the scratchpad. The final step is hashing the entire scratchpad to produce the resulting value. 


Not an easy task, for best performance a very custom architecture is needed and an fpga with a lot of on-chip memory to satisfy the algorithm need. 


PS: DDR4 memory latency can hurt your performance, don't waste money on a board with things that will be unused. A deep study of the algorithm is recommended.