(We have a solution, but would be good to get a fix in Quartus for this...)
Our PCB has an Arria 10 & Arria II GX on it, using DCLK / DATA0 / nSTATUS / etc. for passive serial configuration.
Arria 10 has nCE=0, and its nCEO output is linked to Arria II GX's nCE input (with a 10k pull-up).
The Arria 10 configures fine and pulls nCEO low just before the end of sending the full RBF file - I think this is normal. HOWEVER, the Arria II GX (which now sees nCE=0) sees the end of the Arria 10's RBF file and this is causing a configuration error early on in the Arria II GX's configuration (I see nSTATUS pulled low about 30 bytes into the proper Arria II GX bit stream).
Looking at the Arria 10 RBF file, I can see a series of 00 00 00 00 bytes and a later series of 6A 6A 6A 6A - and these are confusing the Arria II GX.
Our solution is to hand modify the Arria 10 RBF file to change the 00's & 6A's at the end to FF's. The Arria 10 doesn't need these (it has already been successfully configured before our CPU even sends them).
Please can we have a fix in the next Quartus Pro version to correct this?