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Performance in ARIA II GX

Altera_Forum
Honored Contributor II
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Hi, 

I have a small project where I use PCIE x1 data to transfer data from uP to ARIA FPGA. I have some memories and PIOs. PIOs are control registers, when I'm starting the execution of data processing. I've 2 memories for data input and one for output. After I set input data i set control register value, but sometimes at this moment input data is not available for reading yet. What Can i do to figure out, why is it so? Both the PIOs and onchip memories work on 100MHz clock. Should I slow it down?  

When I simulate it in modelsim everything seems to be OK. 

Thank You 

P.S. I have Quartus II 12.1.sp1 Altera Edition and Modelsim SE.
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