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Altera_Forum
Honored Contributor I
1,409 Views

Power decoupling capacitors placement

Hi all! 

I'm going to develope a board with Cyclone V SoC in UBGA484 or UBGA672 (in both packages distance between balls is 0.8 mm). I have several Terasic development kits with Cyclone V and Cyclone IV and as I can see they place some power decoupling capacitors (in 0201 size) just beneath the FPGA packages. I guess it's not easy to place capacitors this way because of technological restrictions. And I don't think that my PCB vendor can produce such board. The question is if it will be OK to place capacitors out of the package ball area? In this case PCB routing is easier, but the distance between capacitors and power pins is longer.  

Thanks in advance.
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6 Replies
Altera_Forum
Honored Contributor I
294 Views

Hi, 

 

You can use the PDN tool. 

or  

check the link and calculate  

https://www.altera.com/support/support-resources/support-centers/board-design-guidelines.html 

 

Try to achieve lower induction or use best fit method for placement.  

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
294 Views

IMHO you must place decoupling caps directly under the FPGA on the appropriate pins. I do this all the time, using 0402 capacitors and a 0.8mm pitch BGA part. Manufacturing is not a problem, if your vendor can't handle it, many others can.

Altera_Forum
Honored Contributor I
294 Views

 

--- Quote Start ---  

IMHO you must place decoupling caps directly under the FPGA on the appropriate pins. I do this all the time, using 0402 capacitors and a 0.8mm pitch BGA part. Manufacturing is not a problem, if your vendor can't handle it, many others can. 

--- Quote End ---  

 

 

Hi, gj_leeson. How do you do that? 0402 is 1*0.5 mm... PCB footprint is about 1.3 *0.6 mm Group several vcc pads and place one capacitor for them? I almost have no experience in PCB routing, so it's not easy for me to understand this approach :) In case of UBGA672 we have some area free of balls inside the package projection, but not all the vcc pins are placed close to this area. And in case of UBGA484 we've got a matrix of balls without any spaces...
Altera_Forum
Honored Contributor I
294 Views

Use via-in-pad. The capacitor pad can sit on top of the via to the FPGA pin. This increases board (raw fab) cost, maybe 20-25%. I do recall, in the distant past, using 0201 caps without via-in-pad on a 0.8mm BGA, but I couldn't give you any details.

Altera_Forum
Honored Contributor I
294 Views

 

--- Quote Start ---  

Use via-in-pad. The capacitor pad can sit on top of the via to the FPGA pin. This increases board (raw fab) cost, maybe 20-25%. I do recall, in the distant past, using 0201 caps without via-in-pad on a 0.8mm BGA, but I couldn't give you any details. 

--- Quote End ---  

 

 

In the past I have used VIA-in-pad on 1mm BGA parts, and placed 0402 parts at 45degrees over a pair of pads.The trick is rotating the parts 45degrees, using VIP, and finding PWR/GND pairs to use.
Altera_Forum
Honored Contributor I
294 Views

Thank you for your answers.

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