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Hi, I am trying to add the DDR2 SDRAM Controller component in the SOPC builder, and next to it is a grey dot (representing an old/out of date component?) I add it and when "Controller IP Toolbench" is supposed to load, nothing happens - also clicking on edit pops a window up that says "edit module" but again nothing happens...
I am trying to go off of this http://www.altera.com/literature/an/an398.pdf for a guide, but I haven't gotten very far! I was trying also to stay away from using the off-chip memory at all but I need to because there is not enough room on chip, so I wanted to ask if it is possible to create this controller in the SOPC builder and use it with my vhdl design without using the nios ii (I have never used it or SOPC builder for that matter, and I didn't want to for this project :/ ) Thanks!Link Copied
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Hi,
I use ddr2 sdram controller in SOPC Builder and there is a grey dot but it works fine. May be you could have a path problem in your project, check the library position. Use this controller without the Nios II it is quite difficult, you have to write a vhdl or verilog controller to provide the correct signal to sdram controller. Instead read/write from/to sdram with Nios II it is very easy, for example: to read: var = *((volatile alt_u8 *)DDR2_SDRAM_ADDRESS_BASE + offset) to write: *((volatile alt_u8 *)DDR2_SDRAM_ADDRESS_BASE + posizione) = var Best regards Luca- Mark as New
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Thanks, it seems like every other SDRAM controller works for editing but the one I want to pick - I am using the DE1 board is "DDR2 SDRAM Controller Megacore Function" the only controller that would work?
Also is there maybe a better guide for doing this than I can find, I think I have a newer version of the SOPC builder than is in the pdf I was using, and I can't even find "PIO" anywhere, let alone where it tells me to look :(- Mark as New
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Hi,
if you have ddr2 sdram you have to use ddr2 sdram controller. In attachment I give to you two documents: - "ddr and ddr2 sdram controller.pdf" is altera's document and talks about the sdram controller with an example; - "512MbSDRAM.pdf" talks about the ddr2 sdram's operation. I hope this help you. Regards Luca
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