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Problem with JTAG_LOCK on MAX10 Development Kit: Unable to Program or Erase. CONF_DONE alway high.

VecFPGA
Beginner
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Hi everyone,

I’m also having problems with the lock/unlock instruction in the mentioned example. The issue is that after programming the FPGA (on the MAX10 Development Kit) with the design example (in question), the following happens:

  1. When I activate the JTAG_LOCK command (with a button), I can still access the JTAG chain without any issues.
  2. The CONF_DONE pin is always high (even though it returns a different error, see below).
  3. I cannot program the .pof/.sof files, erase, or verify, and I get the following messages:
  • Error (209012): Operation failed,
  • Error (209014): CONF_DONE pin failed to go high in device 1. Make sure all communication cables are securely connected, select a different device, check the power on the target system, or make sure all nCE pins are connected to GND...

If I try to erase CFM0 or UFM individually, it says that the operation was successful, but that’s not the case because the application is still running on the FPGA.

I hope to get some feedback or ideas from you regarding this.

Thanks in advance.

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Fakhrul
Employee
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Hi VecFPGA,


We sincerely apologize for the inconvenience caused by the delay in addressing your Forum queries. Due to an unexpected back-end issue in our system, your Forum cases, along with others, did not get through as intended. As a result, we have a backlog of cases that we are currently working through one by one.


Please be assured that we are doing everything we can to resolve this issue as quickly as possible. However, this process will take some time, and we kindly ask for your patience and understanding during this period. The cases will be attended by AE shortly.


We appreciate your patience and understanding, and we are committed to providing you with the best support possible.


Thank you for your understanding.


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