Community
cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Beginner
250 Views

Problem with Quartus 19.1 under linux, When I Run a Functional Simulation in University Program VWF its never ends

01.jpgSee img

0 Kudos
3 Replies
Highlighted
Employee
14 Views

Hi,

You can set simulation end time,

'Edit'->'Set End Time' from Waveform editor Menu bar.

Please let me know if you have any different concern.

Regards,

Vicky

0 Kudos
Highlighted
Beginner
14 Views

I looked the end time and it shows: 1 uS (I changed with 500nS but nothing happend)

More information:

Simulation options in Functional Simulation Settings: quartus_eda --gen_testbench --tool=modelsim_oem --format=verilog --write_settings_files=off test -c test --vector_source="/home/juanpavz/Dev/verilog/01/Waveform.vwf" --testbench_file="/home/juanpavz/Dev/verilog/01/simulation/qsim/Waveform.vwf.vt"

​---------------------------------

when I start linux, I use terminal:

~$ intelFPGA_lite/19.1/quartus/bin/quartus

/home/user/intelFPGA_lite/19.1/quartus/linux64/libstdc++.so.6: version `GLIBCXX_3.4.20' not found (required by /lib/x86_64-linux-gnu/libproxy.so.1)

Failed to load module: /usr/lib/x86_64-linux-gnu/gio/modules/libgiolibproxy.so

I can make analysis and synthesis (ctrl + k), view RTL and compile (ctrl + l). But I can't simulate with University Program VWF

 

And , when I start the program it shows ​an error message: Error (14565): Can't connect to the Intel FPGA website to check for updates.

 

 

 

0 Kudos
Highlighted
Employee
14 Views

Hi,

Could you provide the design file using any text file or word file for replication purpose?

Regards,

Vicky

0 Kudos