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Programming EPCS devices with JTAG

Altera_Forum
Honored Contributor II
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I was wondering whether this could be present in a design with the epcs_controller in a NIOSII/Avalon subsystem, but it would appear not, per this post in the nios forums: 

http://forum.niosforum.com/forum/index.php?showtopic=2122 (http://forum.niosforum.com/forum/index.php?showtopic=2122)
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Altera_Forum
Honored Contributor II
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To my knowledge these blocks share the internal ASMI interface block ... however, it is possible to still allow these to coexist. There is an option in the serial flash loader interface to share the ASMI connection. This currently would require editing the Verilog or VHDL source for the Nios ASMI block and reconnecting it through the serial flash loader interface. 

 

Of course the option of just flashing the serial flash loader image would allow JTAG communication as indicated in the documentation. For them to coexist you would have to share the ASMI connection as indicated above. 

 

I would recommend contacting Altera Applications ( https://mysupport.altera.com/eservice/ ) and requesting this be allowed automatically. This could be an enhancement to the Nios or ALTASMI_PARALLEL block.
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Altera_Forum
Honored Contributor II
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Hi GIR, 

You mentioned "There is an option in the serial flash loader interface to share the ASMI connection. This currently would require editing the Verilog or VHDL source for the Nios ASMI block and reconnecting it through the serial flash loader interface." 

How to edit ASMI block and reconnect it through serial flash loader? 

I have ASMI connections to EPCS.Int his case,how do I connect(instantiate) SFL? 

 

sfl_inst : SFL PORT MAP ( 

asdo_in =>  

asmi_access_granted =>  

dclk_in =>  

ncso_in =>  

noe_in =>  

asmi_access_request =>  

data0_out =>  

);
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Altera_Forum
Honored Contributor II
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This is somewhat detailed in the Serial Flash Loader documentation here: http://www.altera.com/literature/an/an370.pdf  

 

You need to first create a SFL using the MegaWizard, under JTAG-accessible extensions, then Serial Flash Loader. 

 

The JTAG connection will be active when noe_in is low and asmi_access_granted is high. 

 

The ports asdo_in, dclk_in, ncso_in and data0_out would connect to either your user logic to control the EPCS device or to the SOPC Builder EPCS Serial Flash Loader pins from an SOPC project instance (to drive these pins out of SOPC uncheck "Automatically select dedicated active serial interface if supported" and "use dedicated active serial interface" in the EPCS Serial Flash Controller section).  

 

Then just instantiate the SFL in your source code (Verilog or VHDL) and connect up these pins (asdo_in, dclk_in, etc) and Quartus will automatically connect up to the EPCS interface pins.
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