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Programming a CycloneV device when not using the SoC

New Contributor I

This is a follow on post............


If I use a CycloneV device, but do not intend to use the SoC portion, is there a programmer setting that will not require jumping through hoops as described above?  Or, is there a way to modify the FPGA device list to add a specific device to make the process easier.

Or, is there a way to modify the default for the .qar file so that a .cdf file is always included in the archive?

I grade a lot of projects submitted as .qar files, and always have to spend time getting the programmer setup for each project. 

Hoping there is an easier way.




I am using a Terasic DE10-Standard board containing a CycloneV SX device.  So far all projects are just using the FPGA fabric, and not the ARM subsystem.

After creating a new Quartus project and banging out some Verilog (all in the GUI), the programmer is launched.  The programmer open with a single "device" shown, 5CSXFC6D6F31.  Programming fails since the SoC portion of the part is also in the JTAG chain.  So, hit the auto detect button, enter the correct value for device 2 (5CSVFC6D6), and the graphic shows to parts - SOCVHPS followed by 5CSEBA6.  Assigning the programming to the non-SoC device file results in a third "device" in the chain, the original 5CSXFC6D6F31.  Still cannot program, first must delete the 5CSEBA6.

After all those steps, all is well.  And, saving the programmer configuration file sorts this out, as subsequent programming episodes open up the programmer with the correct setup.

Why does Quartus not initially recognize that there is an SoC in the chain?  And, why do I have to delete a device in the chain after adding programming file?  

Shouldn't this just work?


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3 Replies

Please let me know if my understanding is not correct. So you are asking why the quartus will show all the devices in the JTAG chain when click "auto-detect"? Why will it not automatically remove the non-essential device in the JTAG when you attach the JIC?

New Contributor I

Yaun, the basic question is why I have to go through a series of 10 steps to program my part, when Quartus has all the information to set up the programmer correctly.  I suppose the answer is that no one is working on anything related to older FPGAs anymore, and that no resources are available unless requested by a major customer.  I understand and accept that. 

Normally ease of use issues can be ignored, especially if they only occur rarely.  My problem is that I must repeat the same series of steps over and over as I grade assignments. 


Feel free to close this thread, I feel as through we are going around in a circle on this.


Sorry for the inconvenient cause. I think this is how Quartus Programmer works when you click auto-detect. It will include all the component in the chain. When you add the JIC file, you must either device all the non-programing component / tick only the device which you are programming. I hope this help. Cheers