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Hi to all.
For my project I am using a Cyclone IV-E FPGA.
The lowest input voltage on its IO pins is -0.5V (as showed on Altera datasheet).
I have many input that can be lower that -0.5v (around -3v beacause its come from analog comparator) but for me their value condsidered as 0V.
Can I use a diode as protection of FPGA IO pins and to interpreted the negative voltage values as 0/GND?
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Hi,
Both scheme holds good for your design.
Refer table 6-2 for impedance details.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyiv-51006.pdf
Regards
Anand
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Hi,
Yes, We can use external diode so that we can meet the devices absolute maximum DC input voltage and maximum allowed overshoot/ undershoot voltage requirements.
Regards
Anand
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Thank you.
Even if it's not properly referring to FPGAs, could you tell me a suitable diode?
In the meantime, I have come up with another solution, which uses a transistor and which should be both faster and safer than the diode. I enclose the scheme. What do you think?
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Hi,
Even if it's not properly referring to FPGAs, could you tell me a suitable diode?
>>Sorry we can'l recommend any part number However you can refer development kit schematics for it.
In the meantime, I have come up with another solution, which uses a transistor and which should be both faster and safer than the diode. I enclose the scheme. What do you think?
>>Yes, Design with MOSFE looks good, Even i have used it in my first project.
Regards
Anand
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I'm also trying this scheme, which uses a N type MOSFET.
Which is the best solution?
Also, what is the input impedance of IO PINs of the FPGA?
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Hi,
Both scheme holds good for your design.
Refer table 6-2 for impedance details.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyiv-51006.pdf
Regards
Anand
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Thanks for the reply.
I still have some doubts concerning the input impedance, in my case, I use a 3.3V LVTTL level, but in table 6.2 I don't see any value of the input resistance.
How should I interpret?
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