Quartus System Console

[MK_ABQ]

Hi, 
I have couple of questions regarding the system console tool used for debugging. 

1) How does this tool communicate with the FPGA?

2) Do we need to invoke any special IP core in the design, or can we use this tool for debugging a simple code like say for example:  a blinky LED code?

Thanks,

MK

[sstrell]

Typically, it connects through JTAG but there are other options.  Yes you need a bridge or some IP like a Nios II to connect.  See the documentation and training:

https://www.intel.com/content/www/us/en/docs/programmable/683819/22-4/analyzing-and-debugging-designs-with-84752.html

https://cdrdv2.intel.com/v1/dl/getContent/653126

[IntelSupport]

MK,

Yes, system Console runs on your host computer and communicates with your running design through debug agents. Debug agents are the soft-logic embedded in some IP cores that enable debug communication with the host computer. For example are Nios® II with debug and JTAG to Avalon® Master Bridge IP core.

[IntelSupport]

Let me know if there is any other concern at your end from previous reply

[IntelSupport]

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