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Quartus prime pro 20.3 Fitter Error

MK_ABQ
New Contributor II
799 Views

Hello,

I am trying to compile my design with TSE MAC. I could see a fitter error from quartus which seems to be from internal PLL in one of the IP. Can you kindly help?

 

MK_ABQ_0-1674229053152.png

 

 

Note that the same design is working fine with 17.1 prime. 

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1 Solution
ZiYing_Intel
Employee
700 Views

Hi MK_ABQ,

 

It's seem look like the problem of clock pin. You are required to use dedicated clock pin if you want use clock pin. Below .qar file compilation successfully from  my side.

 

Best regards,

Zi Ying

View solution in original post

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5 Replies
ZiYing_Intel
Employee
740 Views

Hi MK_ABQ,


Thanks for submitting the issue.

Please do let me have some time to investigate on your case and I will get back to you with findings.


Best regards,

Zi Ying


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ZiYing_Intel
Employee
738 Views

Hi MK_ABQ,


Would you mind to share your design?

So that I can debug the problem from my side.


Best regards,

Zi Ying


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MK_ABQ
New Contributor II
715 Views

Hi Zi Ying,

Please find the project attached hereby. And sorry about the typo in the title. Fitter error found in 18.1 version.

Error found in Quartus 18.1.0 Build 222 Pro edition. 

 

Thanks

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ZiYing_Intel
Employee
701 Views

Hi MK_ABQ,

 

It's seem look like the problem of clock pin. You are required to use dedicated clock pin if you want use clock pin. Below .qar file compilation successfully from  my side.

 

Best regards,

Zi Ying

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ZiYing_Intel
Employee
670 Views

Hi MK_ABQ,

 

Since I have addressed your question and didn't hear any feedback from you, I am now close the case. If you still have any question after the closed case, please do feel free to submit another issue.

 

Best regards,

Zi Ying

 

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