I use 3 IPs
Transceiver Native PHY + Reset Controller + fPLL
This Design is Transmitter only, and parallel 40 bit
In Transceiver Native PHY, "tx_clkout" is used as a clock for tx_parallel_data
I shot "tx_clkout" with a scope.
in the fPLL 2GHz, x_clkout = 100MHz
So I thought.
If you receive 40 bits in parallel at 100Mhz,
Serial should be 4GHz.
Therefore, the clock frequency is increased to 4GHz. (fPLL)
Then it was x_clkout = 200 MHz.
How to set the clock frequency?
I tested the frequency below
Can you please share below info.
1) Which Operating system you are using?
2) Which Quartus Software version you are using?
3) Which device(OPN) you are targeting?
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