Recommended PHY to connect to Cyclone V 5CSXFC5D6F31I7N

[avib]

Hello,

We are developing a product that includes Cyclone V P/N 5CSXFC5D6F31I7N.

We are using 2 of the HPS Ethernet ports with RGMII interface.

1.           In the Evaluation Board, Intel used Microchips' KSZ9021RN PHY. This PHY is an obsolete device and we cannot use it in our design. Do you have any recommendation for an alternative device that can replace KSZ9021RN PHY ?

2.           We are thinking about using Marvell PHY 88E1512P. According to the PHY's data sheet, it has by its default, a delay of minimum 1.2 nS on its Receive Path (Output PHY to MAC), and -0.9 ns Setup time on Tx Path (Input MAC to PHY).

This delay time is fixed for the TX and RX RGMII path (not like the KSZ9021RN) and it is set by default.

Is that good enough, or an additional delay should be added on the PCB? If yes how much?

Thanks

Avi

[Abe]

You could try with the KSZ9031 as its a direct replacement for the KSZ9021. Check the following link for migration information:

http://ww1.microchip.com/downloads/en/DeviceDoc/Migration%20Guide%20-%20KSZ9021RN%20to%20KSZ9031RNX%20rev1.1.pdf

[avib]

Thanks Abe.

Did anyone use this part (KSZ9031) or Marvell's 88E1512P with the Cyclone V HPS and can approve that it is working?

[EV]

The KSZ9031 is working fine with our EMAC driver for the Cyclone V, Arria 5 & Arria 10.

We haven't tested the 88E1512, but the 88E1518 is OK

[avib]

Thank you EB.

D​id you need to do any adjustment, through registers or layout, or it just worked by default?

[EV]

If you want to operate at 1Gbps you'll likely have to set the RX & TX clock/data skew for your target board.

For the other configuration, I always program everything as I never rely on default values.

[avib]

Eventually, we are going to use the Marvell 88E1512 . As I wrote in my first question:

According to the 88E1512 PHY's data sheet, it has a fixed delay of minimum 1.2 nS on its Receive Path (Output PHY to MAC), and -0.9 ns Setup time on Tx Path (Input MAC to PHY).

This delay time is fixed for the TX and RX RGMII path (not like the KSZ9021RN) and it is set by default.

Is that good enough, or an additional delay should be added on the PCB? If yes how much?

Thanks!

[EV]

These default delays can be changed by disabling the default setting.

You are the one who can answer if the defaults values will be OK with your board.