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Hello
I'm doing FPGA emulation of digital sections of chips prior to manufacturing.
My architecture is as follows:
-- an embedded processor, its MIF file for the software (not NIOS) and its peripherals
-- the RTL of the device to emulate
The time required to process the process is roughly 1h.
Sometimes I only need to update the MIF (to correct SW bugs..) and the whole thing goes for a complete compilation, to me this really is unnecessary:
-- as the size of the RAM where the MIF goes is always the same
-- never any other design change
How could I make this faster?
Thanks for your advice
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Hi @Thomasu
I believe you are asking how to update the MIF without a complete compilation.
You may refer to the KDB below:
There also a similar forum case on this as well, you may refer this as guidance:
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.
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Hi @Thomasu
We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.

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