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VNevř
Beginner
434 Views

Remote update, unable to create factory configuration

Currently using a Cyclone V with a EPCQ256 flash. I am trying to have 2 application bitstreams and one factory bitstream with the Remote Update IP. I am unable to write the page address parameter successfully and i have noticed the "Configuration mode" (param 101) is always set to REMOTE (1) and I am unable to write it. How do I go about writing the page address successfully?

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5 Replies
YuanLi_S_Intel
Employee
97 Views

Hi Vojtech,

 

Please allow me to clarify further, the “configuration mode” that you mentioned is the Master State Machine Current State Mode?

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_altremote.pdf (Page 29)

 

Also, the REMOTE (1) is meant for the state machine 01: Application Mode? Please clarify.

 

Also, you are having problem to program both factory and application image into flash or to perform reconfiguration?

 

Thank You.

 

Regards,

YL

VNevř
Beginner
97 Views

By "Configuration mode" (param 101) I have meant the value read from the IP with param set to b101.

 

Yes, I have meant the Application mode.

 

I am currently creating the .pof file using the "Convert Programming File" utility present in Quartus Prime such that I have 3 sof pages each with its own file.

After switching on, the FPGA is automatically loaded with the image from the page with the highest number.

 

This is how the pof is created

example.PNG

 

I would expect the default image to be considered the factory image and the others the application images but I may indeed be wrong and this is the part I do not understand fully.

 

Let me reformulate then. How does one mark an configuration as a factory configuration?

 

Also I am not using the Avalon interface.

 

 

Best regards

 

VN

VNevř
Beginner
97 Views

My apologies, I have meant to say the factory is at page 0. (The image was created not during the process of actual pof creation but later) The behavior is as described.

VNevř
Beginner
97 Views

Changed to Avalon interface, still same behavior. Also noticed that after reading register 0x0 (RU_RECONFIG_TRIGGER_CONDITIONS) all the bits are set to 1 which does not make sense to me as the default state is 0.

 

Regards,

 

VN

VNevř
Beginner
97 Views

I have managed to finally get the FPGA to reconfigure. I found all the information in AN 603: Active Serial Remote System Upgrade Reference Design. Even though the document is dated, the majority of information is still relevant. I have not been setting the device configuration mode as remote in the Assignments->Device->Device and pin configurations->Configuration menu.

 

I hope this helps anyone who is struggling with this like me.

 

Best,

 

VN

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