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Hello all. I'm about to venture into my first SPI design for FPGA - and i'd like to scour the forums for information. When i search the forums for SPI the results are 0.
What are the key words i should search Altera/Intel for examples and explanations on SPI implementation? Thank so much for your help and comments.Link Copied
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Hi,
--- Quote Start --- Hello all. I'm about to venture into my first SPI design for FPGA - and i'd like to scour the forums for information. When i search the forums for SPI the results are 0. --- Quote End --- Try with Intel/Altera website below are some useful links, https://www.altera.com/documentation/eis1405933174842.html https://cloud.altera.com/devstore/platform/?acds_version=16.0&ip_core=spi&family=max-10 Refer the SPI_Bridge_Design_Example.zip under the For Cyclone III: https://www.altera.com/support/support-resources/design-examples/intellectual-property/embedded/nios-ii/exm-spi-bridge.html Let me know if this has helped resolve the issue you are facing or if you need any further assistance. Best Regards Vikas Jathar (This message was posted on behalf of Intel Corporation)- Mark as New
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The answer by Vikas reveals the ambiguity of your question. Are you looking for an embedded processor SPI interface as addressed in the links or for a simple low level interface driven by the FPGA fabric?
The latter isn't but a shift register and some supplemental logic providing the framing. Most FPGA designers are writing it from the scratch according to the specific application requirements.- Mark as New
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--- Quote Start --- The answer by Vikas reveals the ambiguity of your question. Are you looking for an embedded processor SPI interface as addressed in the links or for a simple low level interface driven by the FPGA fabric? The latter isn't but a shift register and some supplemental logic providing the framing. Most FPGA designers are writing it from the scratch according to the specific application requirements. --- Quote End --- Thank you. I love the IP available but am hoping there are examples of scratch code to get my project up and running fast. I realize that's what Intel IP is for once you have the system down. I hadn't found anything with enough detail on the boards. But i tried looking for MISO today and a bunch of threads popped up. :cool:
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