Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20704 Discussions

SRIO Message Passing

Altera_Forum
Honored Contributor II
948 Views

Hi, 

 

I'm a software engineer and new to Altera support so please forgive me if I'm asking obvious questions or posting to the wrong forum! 

 

We are designing a hardware platform that connects a TI OMAP to a TI C6455 using an FPGA and SRIO. More specifically the OMAP talks to the FPGA using the EMIF and then FPGA talks to the C6455 using SRIO. 

 

I had been hoping to pass SRIO Messages around the system (as well as streaming video from the FPGA to the C6455 using Direct I/O) but I've just discovered that the FPGA SRIO Mega Core only implements the SRIO I/O logical layer. This means that if we want to use Messages we will have to implement the Messaging logical layer in software on the OMAP (the hardware engineer thinks it is too difficult to do on the FPGA). 

 

Are there any examples of how to pass Messages around a system that includes an FPGA? 

 

Do Altera have any recommendations in this area? 

 

Thanks, 

Matt
0 Kudos
0 Replies
Reply