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I write to 16-bit RAM.
The message I write is
CONT_WRITE ADR_MSB ADR_LSB DATA0_MSB DATA0_LSB …. DATAn_MSB DATAn_LSB
where
CONT_WRITE –command - continuous write .
ADR_MSB ADR_LSB -start address. (sspi_cont_addr <= ADR_MSB & ADR_LSB)
DATA0_MSB DATA0_LSB – a pair bytes of data.
---------------------------CONTINIOUS WRITE-------------------------------------
when ST_CONT_WRITE_1 => --first address and data
SITAL_1553_1_ADR <= sspi_cont_addr;
SITAL_1553_1_CS <= '1';
SITAL_1553_1_WR <= '1';
SITAL_1553_1_RD <= '0';
st_count := 0;
byte_idx := 0;
--skip command and address
if (bytes_counter = X"03") then
SitalState <= ST_CONT_WRITE_2;
end if;
when ST_CONT_WRITE_2 =>
if (cs2 = '0') then
if (new_byte = '1') then
--next data
if (byte_idx = 2) then
byte_idx := 0;
--next address
sspi_cont_addr <= sspi_cont_addr + '1';
end if;
SitalState <= ST_CONT_WRITE_3;
end if;
else --end of message
SitalState <= ST_SITAL_IDLE;
end if;
when ST_CONT_WRITE_3 =>
--set a word from bytes
case byte_idx is
when 0 =>
sspi_cont_data(15 downto 8) <= sspi_data;
SitalState <= ST_CONT_WRITE_2;
when 1 =>
sspi_cont_data(7 downto 0) <= sspi_data;
reg_count := 0;
--a word is complete
SITAL_1553_1_ADR <= sspi_cont_addr;
SITAL_1553_1_DIN <= sspi_cont_data;
SitalState <= ST_CONT_WRITE_4;
when others =>
end case;
byte_idx := byte_idx + 1;
when ST_CONT_WRITE_4 =>
reg_count := reg_count + 1;
--set the address and the data
SITAL_1553_1_ADR <= sspi_cont_addr;
SITAL_1553_1_DIN <= sspi_cont_data;
--expose the data on the bus for x ckocks
if (reg_count = 8) then
SitalState <= ST_CONT_WRITE_2;
end if;
I see all words in RAM. But sometimes some word is ''broken''. Say instead of 0x8000 I see 0x8100. I send 30 byte (15 words). Usually I see ''broken'' words 2 and 14, sometimes others.
What possibly can be the problem?
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3 Replies
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Hi,
May I know how you are verifying the data , is it through signal tap
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It's hard to catch the problem with signal tap. But I found the problem. It was clocks synchronization problem.
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Hi EEren,
Glad to to know that the issue is been resolved
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