Simple pin assignments using text file

[Altera_Forum]

Hi, 

I am just starting out with Quartus II Free 13.1 using an EP3C40U48417 device. We use the device in the main to allow us to change peripheral to processor pin allocations. Our processor has a pin multiplexing function.  I would like to automate the configuration of the FPGA using the processor's pin multiplexor settings. This is a simple programming job if I can use a text file to map one FPGA pin to another e.g.  PIN_G10 to PIN_F5 PIN_A7 to PIN_E16  What format text file must I use? Where does that text file go in the project. I found an example project's .qsf file which seemed to contain pin mapping details but the file did not update as I added new pins. I am not sure how the project elements fit together. A few key words would help me get started & read the correct sections.

[Altera_Forum]

Pin assignments can be controlled using Tcl statements. Open your Quartus project and select Project->Generate Tcl File for Project, and then look at that Tcl script (the pin assignments start with set_location_assignment). The pin assignments can then be changed by issuing pin assignment statements in the Tcl console. If you cannot see the Tcl console, make it visible using View->Utility Windows->Tcl Console. 

 However, if you change the pin assignment you need to re-synthesize the design to make that change "stick".  If you could explain a little more clearly what you are trying to do, members on this forum can help.  Cheers, Dave

[Altera_Forum]

Thanks, I will have a look. 

 I want to be able to create a definition of pin inputs to pin outputs using text file(s). In this way I can write a Windows program to generate the definition of what FPGA input pin connects to what FPGA output pin. This would remove a lot of manual steps involved in keeping various project definitions aligned.  I am used to using ISVLever & in that tool you could specify pin assignments using a text constraints file.

[Altera_Forum]

--- Quote Start ---   I want to be able to create a definition of pin inputs to pin outputs using text file(s). In this way I can write a Windows program to generate the definition of what FPGA input pin connects to what FPGA output pin. This would remove a lot of manual steps involved in keeping various project definitions aligned.   --- Quote End ---   Ok.    --- Quote Start ---   I am used to using ISVLever & in that tool you could specify pin assignments using a text constraints file.  --- Quote End ---   Ok, then the Quartus Tcl scripting should do what you want.  Do you have an Altera development kit? I've created Tcl examples for several kits. I can point you to an example, so you can see how the Tcl scripts can automate the design. This makes project maintenance much easier.  Cheers, Dave