Hi everyone,
I'm working on a project involving Intel's MAX 10 FPGA, and I'm currently trying to simulate access to the CFM (Configuration Flash Memory) region.
As far as I understand, simulation support for UFM exists, but I couldn't find any clear reference regarding CFM simulation support.
I'm wondering:
- Has anyone built or used a functional model for the CFM to enable such simulation.
- If not, are there any recommended workarounds, such as mocking or emulating the flash behavior?
Any help, tips, or references would be greatly appreciated.
Thanks in advance!
Shahaf
