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Stratix 10 SX SOC DVK: Seeing (Detected)Errors on HPS DDR during testing by BTS Example Project

MIT_R_D
New Contributor I
327 Views

We brought new S10 SX SoC DVK. We started with initial Board testing with BTS.

we are able to program GPIO, FMCA & FMCB sof and tested the functionality. We are able to test GPIO and SERDES and its working.

We are seeing large numbers of error detected when we test the HPS DDR. Please Refer the screen shot.

Velu_0-1623352542626.png


May i know the reason and how can we rectify this issue?

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1 Solution
MIT_R_D
New Contributor I
192 Views

Reason for Failure: HPS DDR Parameters were different in example design and BTS HPS_DDR Example Design. May be deferent DDR speed grade used in old and new DVK
 
If anyone face this issue with latest S10 SX DVK. 

Please change HPS DDR Parameters like below(old speed bin - 2400 and new speed bin - 2666)
U can also download above GHRD project and reverify. above GHRD having proper HPS DDR parameter settings

MIT_R_D_0-1625058310542.png

 

 

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5 Replies
EBERLAZARE_I_Intel
288 Views

Hi,

 

Are you using the GHRD to test this? Also, are you using Uboot/Linux to boot up the HPS? Were there any errors during your boot up?

 

MIT_R_D
New Contributor I
285 Views

Hi @EBERLAZARE_I_Intel 

Thanks for your response.

We were purchased one S10 board and started our development activities. Unfortunately that Board gone bad. So we purchased new one and try to reassume the activity. We try to load our project in new S10 board which was booted successfully in old board, we are seeing following errors.
DDR: emif_clear() failed.

Velu_0-1623759343321.png

So We decided to test DDR Functionality with help of BTS example project that time we are seeing some error counts on Detected error.

Velu_1-1623759549955.png

 

EBERLAZARE_I_Intel
253 Views

Hi,

 

Do you have the additional HPS DDR that you could swap from the old board to see if that would work? 

 

Here are the following suggestions:

  1. Could you check if the DDR settings and configuration in Platform Designer has been set correctly as per spec.
  2. If the DDR settings is the same, you could try swapping out the HPS DDR from the old board.
  3. Boot using GHRD, this should work by default:
    1. https://releases.rocketboards.org/release/2020.11/gsrd/s10_gsrd/
    2. https://rocketboards.org/foswiki/Documentation/Stratix10SoCGSRD
MIT_R_D
New Contributor I
232 Views
MIT_R_D
New Contributor I
193 Views

Reason for Failure: HPS DDR Parameters were different in example design and BTS HPS_DDR Example Design. May be deferent DDR speed grade used in old and new DVK
 
If anyone face this issue with latest S10 SX DVK. 

Please change HPS DDR Parameters like below(old speed bin - 2400 and new speed bin - 2666)
U can also download above GHRD project and reverify. above GHRD having proper HPS DDR parameter settings

MIT_R_D_0-1625058310542.png

 

 

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