Stratix 10 TX : JTAG configuration through CPU

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Stratix 10 TX : JTAG configuration through CPU

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Hello

Is there a reference document & software source Reference code available for customer's reference, to configure Stratix10 FPGA through JTAG using CPU (bit bang the JTAG pins to download the code).

Thanks,
Kumar

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