Stratix DSP kits 1S25 and 1S80

[Altera_Forum]

Any serious NIOS-II design will have to boot from a flash. You have to provide means for programming the flash. stratix 1s25 and 1s80 dsp kits are no different in that respect, but as opposed to the NIOS kits from Altera, the Stratix DSP kits have no offical support files for NIOS-II. This post should help you in that.  

 A reminder: If you want to be able to program the flash on the Stratix 1S25 and 1S80 DSP kits (and any hardware for that matter) using the nios-IDE programmer interface, you need a special FPGA design which bidges the gap between the jtag port and the flash. NIOS-IDE has no way to know how the flash is attached to the FPGA. You have to supply this information in the form of a custom FPGA design.  The design for this is documented in the nios-ii flash programmer, user guide (http://www.altera.com/literature/ug/ug_nios2_flash_programmer.pdf). I have made these designs and used them extensively. Feel free to use them as well (as usuall, no warrenty and use it at your own risk). They are attached to this post with source code and all, so you can change to your likings. I have written some remarks in the design concerning documentation problems with the dsp kits. There are errors in the SSRAM descriptions. Stricly speeking, this information is irrelevant to this design but better have it here than nowhere.  installation is the following:  Extract the zipfiles, and keep the directory structure. Copy the two folders stratix_dsp_s25_kit and stratix_dsp_s80_kit to your computer or network. Im not sure its wise to rename them. Actually you may not need both, but only the one concerning you board S25 or S80 but thats obvious probably. Personally I have a folder called MyNiosComponents to store this kind of global stuff. Start SOPC builder and go the menu: file-> SOPC builder Setup -> in "Additional directories..." type the full path to your MyNiosComponents folder.  its use: In your NIOS-II design you now can select stratix_dsp_s25_kit and/or stratix_dsp_s80_kit as the board type.  When you start the flash programmer in the IDE, this configures the Stratix chip with the design mentioned here. It downloads the stratix_dsp_sxx_kit.sof files via JTAG. The programmer writes this to the console so you can see whats going on. The design consists of a processor (I would not be surprised if its NIOS http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif , but its not relevant here) which takes commands from the jtag-port and accesses the flash with the commanded operations: erase, read, program etc. All this will be transparent to you, so no worries.  During the process, you will see the hex display flashing in some weird way. I just hooked the addess and data to the 7-segments to see that something is hapening.  When I get the time, I will post to NIOS forum IP my implementation of the SSRAM interfaces for the Stratix S25/S80 dsp kits as well.   Voila, thats it, have fun, and any feedback are welcome.

[Altera_Forum]

Hi: 

you are right !  Now I found a new problem, when I use the attachment listed by you . I designed a project based on the stratix_dsp_s25_kit throught the NIOSII , but a found a additional pin which named E_en_to_the_cpu0 ,what&#39;s wrong with it? and how can I removed it ?

[Altera_Forum]

First of all this has nothing to do with the design I downloaded, because although you base your design on that code, the code simply tells the IDE what sof file to load when programming the flash. If you change the board type you will likely see the exact same problem, but you cant program the flash ofcourse. Try it. 

 I have seen this problem before and it is a flaw in pre nios 1.1 versions. There has been discussions about this on niosforum with contributions from some of the altera developers. You could search for it, (I tend to spend too much time when trying to use the search utility on nios forum, so please try for yourself). What I recall for cure is that you should make sure you use the latest software: nios 1.1 and quartus 4.2 sp1.  For other reasons, dont try to use nios 1.0 and q4.2 or nios 1.1 and quartus 4.1.  I think to recal that if you include the jtag-uart or rs232 uart the problem goes away. Something in that direction, but I am not sure. I do recall though that the design worked as long as the additional pin was tied to Vcc (or was it gnd http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/dry.gif )  hope this helps. Maybe someone else could give a more specific hand?