Stratix II device LE usage

[Altera_Forum]

One basic question: I am implementing this function in Stratix II device. 

 A + B + C + D | E ^ F ^ G ^ H   All inputs are one bits.   Can some one let me know many Logic elements will this require? 

[Altera_Forum]

I think that you should either get the free WEB tools, or get access to a computer with the tools and code up the function in verilog or VHDL, then compile the design, and review the report for LE (logic elememt) usage.