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Stratix III- JTAG header power supply issue...

Altera_Forum
Honored Contributor II
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Hi, 

We have custom-designed Stratix III FPGA boards for our particle tracking experiments. One board gave an error while configuring the device. Later we found that 8-mil trace which powered(3.3V) the JTAG header on the FPGA board was burnt. This board was working properly before this happened. Can anyone tell us the maximum current being pulled by the JTAG header while the FPGA is configured using an USB Blaster. 

Thanks, 

Susantha
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Altera_Forum
Honored Contributor II
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Can anyone tell us the maximum current being pulled by the JTAG header while the FPGA is configured using an USB Blaster. 

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It's in a few mA range. You should expect a defective USB-Blaster or cable causing the damage. It's a good idea however to provide some kind of protection, e.g. a PTC fuse if the output isn't short-circuit proof.
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

It's in a few mA range. You should expect a defective USB-Blaster or cable causing the damage. It's a good idea however to provide some kind of protection, e.g. a PTC fuse if the output isn't short-circuit proof. 

--- Quote End ---  

 

thank you FvM for your reply. 

 

If we exclude defective USB-Blaster, could this kind of damage occur due to PCB design error or some kind of malfunction in Stratix III to pull more current from the JTAG header while being configured through the USB Blaster. 

 

-Susantha
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Altera_Forum
Honored Contributor II
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I would expect a static fusing current in a 1 A order of magnitude for the 8 mils trace. I my opinion, it's effectively impossible to sink it by the USB Blaster driver circuitry, except if it has an massive short. It surely won't continue normal operation after this event. 

 

For a detailed analysis of short circuit behaviour, you have to consider the different driver hardware of Altera Rev. B, Rev. C and Terasic USB Blaster. 

 

As another question, have you connected the JTAG unused pins different from Altera suggestions?
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