Stratix V - Dynamic Phase Shift PLL - Modelsim Fatal Error

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Stratix V - Dynamic Phase Shift PLL - Modelsim Fatal Error

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Hi everyone, I have a design with only a PLL (in a Stratix V 5SGXEA7K2F40C2 device). This PLL has the dynamic phase shift enabled and I want to simulate this, in order to learn how to use the dynamic shifting. Unfortunately when I try to simulate this design with Modelsim it throws this message: # ** Fatal: Error occurred in protected context. # Time: 0 ps Iteration: 0 Protected: /pll_reconfiguration_vhd_tst/i1/pll_pm/pll2_altera_pll_altera_pll_i_347/ File: nofile # FATAL ERROR while loading design Has anyone simulated PLL with dynamic shift ports enabled? Thanks.

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