Stratix V VCC to GND resistance is almost 0 ohm during AS programming

[abeli1]

Good afternoon, colleagues.

During programming, the protection was activated due to the increase in amperage (1A). I found a closure between the VCC and GND (0.3A) without PCB on some VCC pins (I highlighted in red on the screen).

Tell me please, if I turn them off from power, will the FPGA start (leave the pins highlighted in yellow)?

Thank you in advance

[Kuroneko · Accepted solution]

Hi,

Are those highlighted pins are POR monitored power supply pins? If the POR monitored power supply pins are not power up with the correct voltage level the configuration will not start.

The POR monitored power supply can be refer under the Power-On Reset Circuitry chapter in the Stratix V Power Management in the following link:

https://www.intel.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/stratix-v/stx5_core.pdf