Success! Subscription added.
Success! Subscription removed.
Sorry, you must verify to complete this action. Please click the verification link in your email. You may re-send via your
Description of Failure:
Boards failed at FT Tests with failure step – TempADC at channel hd33 to hd48.
Through analysis, found U15S1R.24 getting 0.466V instead of 0.18V, whereby this is the output of GA1T.
Please kindly provide RMA#, Shipping Address & Account, Name and contact no for return.
Thank you for contacting Intel FPGA Community Forum.
We will send you a private email to get some confidential info.
For more complete information about compiler optimizations, see our Optimization Notice.