Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21269 Discussions

TSE and Optical Support

SDavi9
Beginner
1,100 Views

How do you implement the Optical interface within the TSE ?

Is there any design e.g. that can be used with the Cyclone 10 Gx development board via the SFP+ plugs and OR the FMC connectors ?

Labels (2)
0 Kudos
5 Replies
Yi
Employee
1,045 Views

Hi,

 

TSE IP supports both MAC level MII/GMII/RGMII interface to PHY or serial interface/SGMII with PMA, so it may use with optical PHY as well, but just notice our TSE IP would have up to 1000Mbps ETH MAC.

Enclosed the block diagrams of TSE IP which may help:

1.5. High-Level Block Diagrams (intel.com)

0 Kudos
SDavi9
Beginner
981 Views

Dear Yi,

We have a working design using the TSE implemented within a 5CEFA7U19I7N that communicates to an external PHY. I wanted use a copy of this design to implement it with an external optical Phy \ Transceiver. When I went into the TSE I could not find anywhere within the instantiated TSE parameters to configure it to be used with an external Optical transceiver ? 

 

Best regards

 

Shmuel 

0 Kudos
Yi
Employee
891 Views

Hi Shmuel,

 

Wonder if you are referring to an optical module or external PHY outside the FPGA? actually it depends on the signal that communicates between the FPGA & external PHY, no specific parameter to select but need to select the correct ports and connect them to the target PHY.

0 Kudos
SDavi9
Beginner
644 Views

Dear Yi,

We are looking into a design using an external (from FBGA) optical transceiver ! 

Best regards

 

Shmuel 

0 Kudos
WZ2
Employee
810 Views

Hi there,


I wanted to check if you have any further questions or concerns. If not, I will go ahead and mark this issue as resolved.


Additionally, we would greatly appreciate it if you could take a moment to fill out our survey. Your feedback is valuable to us and helps us improve our support quality.


Thank you for your time and cooperation.


Best regards,

WZ



0 Kudos
Reply