Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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19979 Discussions

TSE on the DE0-Nano-SoC


I have a question how to implement the TSE core on my board. What I am trying to do is transfer UDP packets over the TSE of which the data is stored on the HPS's DDR3 RAM. What I would like to have happen, is have the HPS pass the descriptor list, which as I understand it, is just the list of pointers to where the packets are in memory as well as their length, and then just have the TSE send out the UDP packets. I just have no idea how to do that. I was taking a look at the TSE Example for the Cyclone V dev board found here:, But I was unable to get it to work, partially because I couldn't get it to fit on my board, but also because I couldn't get the linux image to boot. I just don't understand how the HPS in linux is supposed to control this TSE, and how to hook up the TSE in general. Thanks! Appreciate any help.

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Ok, So after looking over the example some more, I understand the mSGDMA parts of the system, but I still don't understand how to tell the TSE that I want to send UDP packets, or how to give it the destination IP address to send the packets to?

New Contributor I

The TSE will only accept full Ethernet packets. If you want to do this yourself (i.e. without using a software TCP/IP stack) then you need to build the complete packet, starting with the Ethernet header, the IP header, then the UDP header and your packet contents. You can look up the contents of all those headers online (for example Wikipedia has good descriptions).