Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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The 10g eth example use the address_decode to configure the tx/rx mac address,how could I configure it in verilog?

rfeng6
Beginner
‎05-11-2019 02:52 PM
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SengKok_L_Intel
Moderator
‎05-13-2019 02:14 AM
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Hi, The design can use system console to configure the configuration register of the design, you can also create your own state machine by using Verilog to configure the 10G MAC address via the Avalon MM interface. Regards -SK
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