Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20405 Discussions

The 10g eth example use the address_decode to configure the tx/rx mac address,how could I configure it in verilog?

rfeng6
Beginner
‎05-11-2019 02:52 PM
461 Views
 
0 Kudos

Link Copied

1 Reply
SengKok_L_Intel
Moderator
‎05-13-2019 02:14 AM
203 Views
Hi, The design can use system console to configure the configuration register of the design, you can also create your own state machine by using Verilog to configure the 10G MAC address via the Avalon MM interface. Regards -SK
0 Kudos
Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.