In out PCB layout, we are using the DC-Coupled connection for Cyclone 10GX transceiver LVDS refclk pad. ( Pin Name: REFCLK_GXB1C_CHTP and REFCLK_GXB1C_CHTN).
The input clock frequency is 125MHz. The Vcm is 1.0V, The AC swing range is 600mV. We measured these numbers from the PCB when FPGA is not configured.
But, we can't see the this refclk waveform inside the Cyclone 10GX fpga.
It always stuck to high in our signaltap waveform. We can see our other LVDS (not for refclk transceivers) clocks in signaltap.
Question 1: Can we use DC-Coupled link besides the AC-Coupled link for Cyclone 10Gx transciver RefCLK_GXB1C_CHTP LVDS pad ?
Question 2: What is the spec for Cyclone 10Gx transceiver LVDS RefClk_GXBL1C pad with DC-Coupled link ? What is the required Vcm ? In the datasheet, it only says AC couple VICM is 0.95V, is the requirement for DC couple different?
1, For questions 1---" Can we use DC-Coupled link besides the AC-Coupled link for Cyclone 10Gx transceiver RefCLK_GXB1C_CHTP LVDS pad ? "
We have found the following statement from intel Cyclone 10gx IO guide line statement:
REFCLK_GXB[L1] Input High speed differential reference clock positive receiver channels, specific to each transceiver bank of the left (L) side of the device.
These pins must be AC-coupled if the selected REFCLK I/O standard is not HCSL.
So please confirm that we can't use DC-Coupled link for Cyclone 10Gx transceiver RefCLK_GXB1C_CHTP LVDS pad.
2, One more question about the transceiver refclk Vicm valuefor AC-Coupled link:
In Cyclone 10GX datasheet (2c10gx-51002.pdf: page 23), The Vicm is 0.95V when Vccr_GXB = 0.95V.
At the same time, We have measured the transceiver refclk Vicm from Intel Cyclone 10Gx development kit.
T he Vicm is only 0.8V in our measurement which is smaller than your spec.
Can you help check it again ?