hello every one, I'm beginner on fpga design. I need to implement a program on fpga using nios ii ide 9.0 for my pfe.
I create a project on nios build it; there are no error but when i try to debug it with the nios hardware i have an error :"There are no Nios II CPUs with debug modules available which match the values
specified. Please check that your PLD is correctly configured, downloading a
new SOF file if necessary." and if i continue with quartus programmer also i have an error "Error: Can't configure device. Expected JTAG ID code 0x020B40DD for device 1, but found JTAG ID code 0x020B60DD.
Error: Operation failed
Info: Ended Programmer operation at Wed May 23 18:05:29 2012" the fpga that i used is cycloneII de2_70.
that's all. Please help, I'm in emergency.
i think may be the problem caused by the sopc system builder chosen in the creation of the project, if so please tell me how can i do.... :(
