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TPham24
Beginner
526 Views

Time synchronization issues between UART and SRAM

Hello. I have a problem between UART and SRAM.

I have top module, Controller SRAM, UART module and other components.

When I sent 1 byte data from PC to FPGA to save to SRAM. The data is not saved immediately, but after 3-6 clicks, send it to SRAM.

I think the data is sampled then sent via UART and stored in the 8 bit register but SRAM reads the data in CLOCK pulse. And it is problem.

Can you help me?

Thanks so much and Best regards!

 

 

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5 Replies
GuaBin_N_Intel
Employee
38 Views

What does you mean "The data is not saved immediately, but after 3-6 clicks, send it to SRAM"? How did you measure the number of clock needed to write into memory? Is the time taken within the SRAM controller or in the interface between UART & SRAM?
dsmirnov
New Contributor I
38 Views

What is the structure of your design? Do you use Nios for it, or pure HDL with state machines?

TPham24
Beginner
38 Views

I only use Verilog HDL. I need fast processing speed.

My UART Controller can store data into the register. Now, I want transfer data into the SRAM.

Can i store data directly into the SRAM or register then save to SRAM.

You have any ideas?

Thanks so much!

TPham24
Beginner
38 Views

I receive data via UART from my computer by oversampling scheme to estimate the middle points of transmitted bits and then retrieve them at these points accordingly. 

So I can't measure the number of clock needed to write into memory since no clock infomation.

My SRAM Controller can read/write data according to enable clock.

I don't know how to sync between UART and SRAM.

And i only use Verilog HDL.

I need high frequency to be able to control the axis of cnc machine. Embedded system can satisfy high frequency?

You have any ideas?

GuaBin_N_Intel
Employee
38 Views

There still must have some sort of clocks to run for both UART and SRAM even though they are asynchronous. Anyhow, with this connection, you should know UART has the baud rate limitation and is relatively slower than writing into the SRAM. To make it higher performance, increasing baud rate is necessary in your case. I would advice you could simulate your design to understand how the data being transferred and time needed.