To update FPGA config memory with closed source VHDL

[CLa_R]

In my project, I still use a Cyclone IV FPGA and a MSC4 config memory.

There is a way for programming the FPGA with a new version of configuration program, distributing the new release to final customer whitout that the user can see the program code (written in VHDL)?

[Abe]

Can you provide the exact memory part number? Which device are you using ? EPCS/EPCQ?

Do you want to configure the FPGA / config memory without exposing the underlying VHDL/Verilog source code at the end-user side? If this is the case, then all you need to provide to the end-user is the compiled SOF/POF files and have the end customer download only the Quartus Programmer standalone version and get the USB Blaster/Blaster II cable. With this setup, all you need send the customer is the compiled output POF/SOF files and show the customer how to program/configure the device. You will not need to send / expose the source code in this case.