Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21615 Discussions

Transceiver output characteristic

sung_chul
Beginner
907 Views

Hi-

1. Question

In Transceiver Native PHY Intel Arria 10/Cyclone 10 FPGA IP,

In 2GHz, Well done

But 5Ghz, 101010 Voltage Swing Very low voltage

below fig show 10101010 ans 11001100, 11101110 

 

sung_chul_3-1667815487623.png

 

2. Question

In assignment editor, I have "Transmitter voltage swhing" amend to a different value

values 30 is OK!

16, 13 is OK!

But 1-8 is not okay.

This value is compile error(Quartus Pro 18.1)

I was not tested all values(1~31)

 

0 Kudos
1 Solution
Kshitij_Intel
Employee
851 Views

Hi Lee,


  1. It looks like, you are having insertion loss on your channel. Insertion loss generally increases with frequency. To overcome high insertion loss use pre-emphasis.
  2. During characterization 1-8 is probably not going to open the eye that's why we have disabled it.


In general to get the better results, reduce the voltage swing & increase the pre-emphasis.


Majorly 2 things effects on the insertion loss.

  1. PCB material
  2. Width of traces


Also, please go through the guidelines.


https://www.intel.com/content/www/us/en/support/programmable/support-resources/signal-power-integrity/signal-integrity-support.html


Thank you

Kshitij Goel




View solution in original post

0 Kudos
2 Replies
Kshitij_Intel
Employee
852 Views

Hi Lee,


  1. It looks like, you are having insertion loss on your channel. Insertion loss generally increases with frequency. To overcome high insertion loss use pre-emphasis.
  2. During characterization 1-8 is probably not going to open the eye that's why we have disabled it.


In general to get the better results, reduce the voltage swing & increase the pre-emphasis.


Majorly 2 things effects on the insertion loss.

  1. PCB material
  2. Width of traces


Also, please go through the guidelines.


https://www.intel.com/content/www/us/en/support/programmable/support-resources/signal-power-integrity/signal-integrity-support.html


Thank you

Kshitij Goel




0 Kudos
sung_chul
Beginner
847 Views

Hi K**bleep**ij

 

Thank you!

Your advice has been very helpful in understanding "Transceiver IP."

 

Sincerely!

 

 

0 Kudos
Reply