Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Transceiver

Altera_Forum
Honored Contributor II
1,539 Views

hello  

i want to do a transceiver using QUARTUS 17.1 but i couldn't merge TX and RX pin in the same Block
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Altera_Forum
Honored Contributor II
300 Views

Hi, 

 

Can you elaborate on below points  

1.Are you using any IP ? Can you name it? 

2.Do you want to do loop back test? 

3.Which device are you using? 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
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Altera_Forum
Honored Contributor II
300 Views

i'm using stratix10. and i'm using stratix 10 L-tile/h-tile transceiver native phy ip

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Altera_Forum
Honored Contributor II
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i found this solution in the guideline  

 

set_instance_assignment -name XCVR_RECONFIG_GROUP 1 –to  

tx[0] 

• set_instance_assignment -name XCVR_RECONFIG_GROUP 0 –to  

rx[0] 

 

but i dindn't know where i put thi solution in the design
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Altera_Forum
Honored Contributor II
300 Views
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Altera_Forum
Honored Contributor II
300 Views

ok i will check thank you

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