USing VCS RTL Simulation from quartus pro generated code

[minjoolee]

HI,

I am using Quartus pro 21.2

1) Generate Simulation model for VCS

2)  go to generate folder 

( Audio.v : my generated PLL name ) 

3) This is user Guide for quartus prime pro

4) In server.

soruce genetated.tcl  Not working.

5)  Guide and script content not same

this is generated file.

  this is guide.

--> How to RTL simulation from quatus pro geneated IP? 

     Just edited script not help.

     I need help.

[RichardTanSY_Intel]

Hi @minjoolee 

Have you Generate the Simulator Setup Script in the document section 2.5.3.2.1. ? 

Intel Quartus Prime Pro Edition User Guide: Third-party Simulation 

Tools > Generate Simulator Setup Script for IP

The script should be in vcs_setup.sh or vcsmx_setup.sh files generated in your project directory. 

Please go through Section 2 Intel FPGA Simulation Basics first to understand the simulation flow before go to section 4. 

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 

[minjoolee]

HI , this is my answer  

Have you Generate the Simulator Setup Script in the document section 2.5.3.2.1. ?  

   --> YES 

       SEE second screen shots

 1)  scripts result are not same as

          Intel Quartus Prime Pro Edition User Guide: Third-party Simulation  

  2) Without ignore comments in script,

      cmd> source vcs_setup.sh    

     should be working. but  not.  

  3)  Can I get simple example such as only 1 PLL design for VCS RTL simulation  .

     to see waveform ( generated FSDB ) 

Thanks

[RichardTanSY_Intel]

The screenshot resolution is bad to look at but the second screenshot seems to generate HDL for the specific IP. Does not look like it generate the Simulator Setup Script.

Anyhow, you may checkout the User Guide below on how to run the simulation using the Questa Intel FPGA Edition. The scripting concept is the same for VCS. 

https://www.intel.com/content/www/us/en/docs/programmable/691278/21-3/quick-start.html 

[minjoolee]

\

  ->Generated simulation Model. 

2)  Actually, In mentor it is easy 

   A)    After generation IP from quartus pro,  turn off it 

   B)     just want to run the simple  script. ( eaxmple.run) 

          vlogen  /!~~~path /generated_IP_name.v 

          ------------------------------------------- 

          ----MISSING PART (wanted part ) ----------------   

          ------------------------------------------- 

          vcs top_name  -kdb 

          simv 

    c)  >>  example.run 

    How to do it ? 

    d)  ur example is for using Quartus, 

          even image link is broken 

Thanks

[RichardTanSY_Intel]

There is changes being done to the document interface, that's probably cause the image broken.

Click the download button at the top to view the whole document with image. 

[RichardTanSY_Intel]

I think you are using the incorrect command. 

Try using sh vcsmx_setup.sh instead.  

source vcsmx_setup.sh is for sourcing the Synopsys VCS MX Simulator Setup Scripts. 

Go through the Questa Quick Start then you will understand the simulation flow. 

[minjoolee]

HI, 

I thinks that we are not same page.

Can you see attachment from Quartus pro 

Just generated one PLL which name is test.

In there, there are script for vcs_mx.

1) Script said  

  source ~~~~~~/vcsmx_setup.sh 

 --> NOT WORKING ( My problem to  run simulation) 

2)  The template is not said as 

            Intel Quartus Prime Pro Edition User Guide: Third-party Simulation  

   Even   same Quartus prime pro version as doc, 

   Why generated script file contents is not same? 

Would check it again?

Thanks

[RichardTanSY_Intel]

For those who come across similar issue:

To run simulation on the design:

1. Go to synopsys/vcsmx
2. Type sh vcsmx_sim.sh
3. A DVE gui will popup:
   
4. Click on Simulator> Setup, change the Simulator argument to -ucligui and Click OK
5. After that, click on Signals>Add to waves >New wave view to generate waveform window
6. Click on the Start/Continue (F5) –see the circled arrow to run the simulation

7. The simulation will run till finish with the waveform is updated with the signals in the tb as shown below
   
   

With that, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.