I have a system consisting of a Cyclone IV GX and a Stratix of the first generation (EP1S25B672C6). The configuration device as an EPCS64. The GX is the master of the configuration chain, with the MSEL bits set for "active serial". The Stratix is the slave device and set to passive serial.The EPCS is loaded with both configurations files from the JTAG, using the indirect addressing scheme. The .JIC programming file is prepared in the normal manner with the Quartus `Convert Programming Files" utility, using the two .SOF files to build the .JIC file. The programming shows no error. But when booting, the CONF_DONE stays low. All the programming signals are very clean, and the nCEO to NCE line between the GX and the Stratix behaves normally. The nSTATUS line stays high during the booting programming cycle. But when the EPCS reaches the end of the programming data and stops sending clocks and data, it seems that the STRATIX is still waiting for more to come, and it does not release the CONF_DONE line. NOTE: The Stratix and GX configures with no problem from the JTAG. Can anyone help?
1.Did you configure the Master as Active serial and select the configuration device?2.Did you configure the slave as passive serial ? If not, you could do it in the assignments -->device -->device and pin options-->configuration 3.Also check the does the DCLK and data goes to the slave device? --Uday
1) Yes, the master is configured in active serial mode, and declares the EPCS64 as the EPROM device2) The Stratix is configured in passive serial mode. 3) the DCLOCK and DATA0 signal get to the proper pins in bothFPGA devices, and the quality of the signals as probed with a scope and a FET probe is excellent. 4) the chaining from the master to slave (nCEO to nCE) was also checked with the scope and occurs as expected. I have used this kind of configuration in the past without any problem with Cyclone devices. But it is the first time I use a Stratix as a slave device, and a Cyclone as the master. Any more hints? Thanks again for the advice.
jp, did you find the solution to your problem? I have a very similar problem except the device I'm trying to configure using PS is a Cyclone IV. I can see the clock and data going, but no cfg_done response.Thanks
--- Quote Start --- jp, did you find the solution to your problem? I have a very similar problem except the device I'm trying to configure using PS is a Cyclone IV. I can see the clock and data going, but no cfg_done response. Thanks --- Quote End --- Unfortunately, I have not found a solution yet. However, with Cyclone IV as a slave device in PS mode, I did not have this problem. Regards, JP