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I have been developing with the VIP suite using Quartus 13.1 for some months, all working happily. I have upgraded to Quartus 14, and all worked fine until I regenerated the QSYS part of the project.
After regenerating, the Clocked Video Output no longer locks to my SOF pulse, and reports underflow, however there is no evidence of underflow on the output picture. The timing with respect to my reference comes up randomly as it no longer locks to SOF. The QSYS VIP blocks I am using are a Frame Reader -> Interlacer -> Clocked Video Output. There is more than enough bandwidth as there is a dedicated DDR3 bank for this video playout, and no other access going on. The problem persists whether I have the interlacer in bypass or not, and in all video standards I try, all of which worked fine in Quartus 13.1. I have also tried Quartus 14.1, and tried migrating to Clocked Video Output II with similar results. I have now rolled back to Quartus 13.1, but would like to move to the latest revision of Quartus. Has anyone else had similar trouble with upgrading to Quartus 14?Link Copied
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Nothing specific on your problem, but having dealt with similar migration problems my suggestion is to make the 13.1 IP blocks available to your 14.0 project, and then upgrade them piecemeal to help determine the point of breakage. (Qsys14.0->Tools->Options...->IP Search Path and specify your 13.1 quartus\ip directory). If the 13.1 VIP blocks fail with the 14.0 DDR3, that is a different line of investigation.
From your description, I would look closer at DDR3<->Frame Reader behavior since that's where underflow will originate from. You can do easy things like deepening the Frame Reader FIFO as much as practical and see if there is any improvement; or use SignalTap on the Avalon-MM port and FIFO and trigger on the underflow condition to see what happened leading up to it.- Mark as New
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Thank you for that, I did not know it was an option to give Q14 access to the old IP... very useful. I shall give that a whirl :-).
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