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Using SignalTap II without JTAG?

Altera_Forum
Honored Contributor II
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Hello,  

 

I have board where I can't connect to the FPGA's JTAG pins. Nevertheless, it would be nice to be able to use the SignalTap II tool to have a look what is going on inside the FPGA - a Cyclone II device. 

 

Is there a way of using SignalTap II through another interface (got some spare pins) than JTAG? 

 

I have a USB FIFO talking to the FPGA, which implements a register interface to control some FPGA modules by software.  

 

I guess the most elegant way would be to add another module which creates a "virtual JTAG" port inside the FPGA to which SignalTap II can connect transparently. That also means that I would need a "virtual JTAG" port on the PC side as well... 

 

...has anyone tried to use SignalTap II with anything other than the FPGA's real JTAG pins?
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

 

I have board where I can't connect to the FPGA's JTAG pins. Nevertheless, it would be nice to be able to use the SignalTap II tool to have a look what is going on inside the FPGA - a Cyclone II device. 

 

Is there a way of using SignalTap II through another interface (got some spare pins) than JTAG? 

 

--- Quote End ---  

You're going to be out of luck. 

 

The SignalTap II component is highly integrated with Quartus, and its unlikely you can massage the results into anything that would route to anything but the FPGA JTAG pins. 

 

Can you route jumper wires from some I/O pads to the JTAG pins? You could then instantiate a SignalTap II component that does use the JTAG pins, but then use your communications interface to access the JTAG pins. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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No, I am afraid I can't change the board, so interfacing to the FPGA's JTAG through "neighbouring" pins is not possible. 

 

It's a shame that SignalTap II is not more flexible on the PC communications interface... at least I can't think of a good reason why there should not be an option to have the SignalTap II's interface ports be accessible by my top-level module instead of hard-wiring them to the JTAG port. 

 

I have seen there is a Virtual JTAG megafunction, could that be an option to access the "real" JTAG pins from a FPGA module?
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Altera_Forum
Honored Contributor II
446 Views

 

--- Quote Start ---  

No, I am afraid I can't change the board, so interfacing to the FPGA's JTAG through "neighbouring" pins is not possible. 

 

--- Quote End ---  

 

 

Make a note for next time: "Always make the JTAG pins accessible". 

 

You can't get to the pins at all? Is the FPGA in a BGA, what about vias on the bottom of the board? What about the TCK pull-ups/and downs you should have put on the PCB? 

 

 

--- Quote Start ---  

 

It's a shame that SignalTap II is not more flexible on the PC communications interface... at least I can't think of a good reason why there should not be an option to have the SignalTap II's interface ports be accessible by my top-level module instead of hard-wiring them to the JTAG port. 

 

--- Quote End ---  

 

 

The communication to the component is based around the JTAG HUB, and the communications infrastructure in Quartus uses the JTAG interface. It would be too hard for Altera to support a generic interface. 

 

 

--- Quote Start ---  

 

I have seen there is a Virtual JTAG megafunction, could that be an option to access the "real" JTAG pins from a FPGA module? 

--- Quote End ---  

 

 

Nope. You can never get to the real JTAG pins. The Virtual JTAG interface is how you get JTAG-like signals inside the FPGA fabric. However, those signals are controlled by the real JTAG pins, via the USB-Blaster. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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My general opinion about the problem: A board without JTAG connectivity is wrong from the start. 

 

Particularly, there are two points aigainst your intention: 

- You would need to create a connection between the Quartus JTAG stack and your custom interface, but the Quartus JTAG stack is completely undocumented. 

- You would need to modify the virtual JTAG hub, but it's protected IP.
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