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[VHDL] Different synthesis results after using "generate"

Altera_Forum
Honored Contributor II
1,913 Views

Hello, 

I used 'generate' statement to order several similar components, but after that synthesis results are slightly different. 

Does anyone know what can cause this? Theoretically there is no difference between these two versions, all connections are the same. Is it matter of some compiler settings? 

 

Sz.
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Altera_Forum
Honored Contributor II
645 Views

Assuming by "results" you mean testing results then either you observation is wrong or your test is wrong or your connections are wrong or you have timing violations. 

 

Without further information, it is only matter of speculations 

 

If by "results" you mean resource utilisation then a difference is not a surprise.
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Altera_Forum
Honored Contributor II
645 Views

please post your code, and tell use how generate modified the design.

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Altera_Forum
Honored Contributor II
645 Views

Thanks for replies. By "results" I mean resource utilisation and timing analysis results. 

 

I have a FIR filter with a chain of 8 MAC modules: 

 

 

--- Quote Start ---  

mac0 : mac 

port map ( aclr0 => mac_rst, 

clock0 => clk, 

dataa => sample(0), 

datab => coeff(0), 

overflow => of(0), 

result => sum(0) 

);. 

mac7 : mac 

port map ( aclr0 => mac_rst, 

clock0 => clk, 

dataa => sample(7), 

datab => coeff(7), 

overflow => of(7), 

result => sum(7) 

); 

 

--- Quote End ---  

Sample, coeff and sum are arrays of vectors. 

 

Instead, I wrote it like this: 

 

 

--- Quote Start ---  

mac_components : for i in 0 to 7 generate 

begin macs : component mac 

port map(mac_rst, clk, sample(i), coeff(i), of(i), sum(i)); 

[/INDENT]end generate mac_components; 

--- Quote End ---  

I'm not sure about this change because, according to TQ, timing results are a bit worse (but still within margin). 

 

Should I be so careful with this type of code?
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Altera_Forum
Honored Contributor II
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The generate statement should be identical to the above code. 

But a different random seed for the fitter may have been used, which can affect the timing. Resource usage should be the same.
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Altera_Forum
Honored Contributor II
645 Views

Ok, thanks. Resource utilisation is a little different too, but I'll send it for testing anyway.

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Altera_Forum
Honored Contributor II
645 Views

synthesis results:)

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